module Somador_CLAhead(a,b,c_in,sum);

input [31:0]a,b;
input c_in;
output [31:0]sum;
wire cout1,cout2,cout3,cout4,cout5,cout6,cout7,cout8;

fourbitadd f1(a[3:0],b[3:0],c_in,sum[3:0],cout1);
fourbitadd f2(a[7:4],b[7:4],cout1,sum[7:4],cout2);
fourbitadd f3(a[11:8],b[11:8],cout2,sum[11:8],cout3);
fourbitadd f4(a[15:12],b[15:12],cout3,sum[15:12],cout4);


fourbitadd f5(a[19:16],b[19:16],cout4,sum[19:16],cout5);
fourbitadd f6(a[23:20],b[23:20],cout5,sum[23:20],cout6);
fourbitadd f7(a[27:24],b[27:24],cout6,sum[27:24],cout7);
fourbitadd f8(a[31:28],b[31:28],cout7,sum[31:28],cout8);

endmodule